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Patent Searching and Data


Title:
SIGNAL PROCESSING CIRCUIT FOR DIGITAL SIGNAL RECEPTION SYSTEM
Document Type and Number:
Japanese Patent JP2000269865
Kind Code:
A
Abstract:

To accurately compensate a phase even if the echo of a transmission line is large by installing a backward equalizer composed of a feedback loop in an equalizing processing part and arranging a phase compensation part in the preceding stage of the backward equalizer.

A feed forward equalizer 20, an adder 24, a slicer 26 and a feedback equalizer 28 execute a waveform equalizing processing. The feed forward equalizer 20 constitutes the so-called forward equalizer. A feed back loop including the adder 24, the slicar 26 and the feed back equalizer 28 constitutes the so-called backward equalizer. A phase compensation processing is executed by a phase tracker 22 arranged the post stage of the feed forward equalizer 20. Since the phase tracker 22 is arranged in the preceding stage of the backward equalizer for executing the waveform equalizing processing, the degradation of the phase compensation capability of the phase tracker 22 caused by the echo is eliminated.


Inventors:
ABE YOSHINORI
TAWARA ICHIJI
Application Number:
JP7263099A
Publication Date:
September 29, 2000
Filing Date:
March 17, 1999
Export Citation:
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Assignee:
PIONEER ELECTRONIC CORP
International Classes:
H03H21/00; H03H7/30; H03H7/40; H03K5/159; H04B3/06; H04L25/03; H04L27/01; H04N5/14; H04L27/00; (IPC1-7): H04B3/06; H03H21/00
Attorney, Agent or Firm:
Yasuo Ishikawa