To provide a simple signal processing circuit that is compatible with a system of separately receiving a video signal which does not include a synchronization signal and the synchronization signal and with a system of receiving a video signal including a synchronization signal, enables other circuitry to be common and fixes and outputs a DC level of the video signal, including the synchronization signal.
A reference level of a base of a first npn bipolar transistor QN1, whose emitter is connected to an input terminal IN is controlled by a voltage resulting from a resistor RL2 and currents from second and fourth constant-current sources 21, 22, an emitter current of a second npn bipolar TR QN2 whose base is connected to the input terminal IN and whose emitter is connected to an output terminal OUT via a resistor RL1 is determined by currents from first and third constant current sources 11, 12 received via a current mirror circuit CM, and the third and fourth constant-current sources 12, 22 output currents, in response to a synchronization signal input separately from the video signal.
TSUJIKAWA TOSHIAKI
YAMADA KUNIO
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