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Title:
SIGNAL PROCESSING PROCESSOR LSI
Document Type and Number:
Japanese Patent JPS59114640
Kind Code:
A
Abstract:

PURPOSE: To shorten remarkably a data transfer time and a processing time by inputting a data from plural serial data transfer lines, executing its operation by bringing it to a serial-parallel conversion, and outputting it to plural serial data transfer lines.

CONSTITUTION: Input data IN1WIN6 are inputted simultaneously by a serial transfer to six serial-parallel converting circuits 11-1W11-6, respectively, from plural serial data transfer lines 101W106. The serial-parallel converting circuits 11-1W11-6 convert said sata to parallel data, respectively, and input them to an arithmetic circuit 13. The parallel data inputted to the arithmetic circuit 13 executes a prescribed operation, receiving a control by an arithmetic control signal from a controlling circuit 16. The parallel data of a result of operation outputted from the arithmetic circuit 13 is converted to a serial data and outputted through output lines 141W144.


Inventors:
NISHITANI TAKAO
SAKAMOTO KENSHIN
Application Number:
JP22518482A
Publication Date:
July 02, 1984
Filing Date:
December 22, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03M9/00; G06F1/22; G06F9/30; G06F15/78; (IPC1-7): G06F5/04; G06F9/30
Attorney, Agent or Firm:
Uchihara Shin



 
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