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Patent Searching and Data


Title:
SIGNAL SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPS6081933
Kind Code:
A
Abstract:

PURPOSE: To constitute a signal synchronizing circuit with high stability by providing changeover switches corresponding to the parts of the 1st and the 2nd systems, and synchronizing PL patterns of both systems with each other completely.

CONSTITUTION: While plural changeover switches are used, the 2nd frequency dividing counter 22 of the 2nd system is reset with the output of the 1st frequency dividing counter 12 of the 1st system through a pulse generator for resetting, and the frequency dividing counter 22 of the 2nd system is reset with a frame signal output to initialize the PN pattern generator 24 of the 2nd system with the frame signal output. Consequently, the counter 12 and the PN pattern generator 14 of the 1st system operate synchronously at completely the same timing with the counter 22 and generator 24, and the two systems seem to operate in one body with the output of one oscillator.


Inventors:
YOSHIDA SHIYUU
Application Number:
JP18967983A
Publication Date:
May 10, 1985
Filing Date:
October 11, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04B7/26; H04L1/22; H04L7/00; (IPC1-7): H04B7/26
Attorney, Agent or Firm:
Toshi Inoguchi