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Patent Searching and Data


Title:
SIGNAL TRANSMITTING CIRCUIT
Document Type and Number:
Japanese Patent JPS6038787
Kind Code:
A
Abstract:

PURPOSE: To prevent a variance of low-level output voltage at output enable time and disable time by providing a transistor (TR) which controls a current quantity and equalizing current amplification factors of individual current paths to one another.

CONSTITUTION: When the output enable state where a control voltage of a terminal 3 of a sense amplifier output circuit 41 is in the low level is set and the sense output of a terminal 1 is in the high level, a TRQ1 of the first differential circuit and a TRQ4 of the second differential circuit of vertical connection are turned on. Then, a current α2×Ics is flowed to a load resistance R1, and a low- level output VOL from a terminal 6 is -α2×R1×Ics-VBES (α is the grounded base current amplification factor of TRs Q1 and Q4, and Ics is the current due to a constant current circuit CS1, and VBES is the voltage between the base and the emitter of a current quantity control TRQ6). When the voltage VC becomes high-level to set the output disable state, TRs Q3 and Q6 are turned on, and the low-level output VOL is the same voltage as the enable state when the grounded base current amplification factor of TRs Q3 and Q6 is denoted as α.


Inventors:
HIRATA MICHIYUKI
Application Number:
JP14497883A
Publication Date:
February 28, 1985
Filing Date:
August 10, 1983
Export Citation:
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Assignee:
HITACHI MICROCUMPUTER ENG
HITACHI LTD
International Classes:
G11C11/417; G11C11/34; G11C11/414; H03K19/086; (IPC1-7): G11C7/06; H03K19/086
Attorney, Agent or Firm:
Akio Takahashi