Title:
SILICON OXIDE CAP ON HIGH-DIELECTRIC CONSTANT FILM
Document Type and Number:
Japanese Patent JP2006310801
Kind Code:
A
Abstract:
To provide a method of fabricating a high-k gate insulating film and a silicon oxide film on the high-k gate insulating film whereby a defect and trapping are avoided that cause a short circuit between doped silicon gates on the high-k gate insulating film.
The method for forming an integrated circuit configuration on a semiconductor substrate includes deposition of the high-k gate insulating material on the substrate by using an atomic layer deposition process. A silicon oxide capping layer is deposited on the gate insulating material in a fast and thermochemical deposition process. A gate electrode is formed on the silicon oxide capping layer.
Inventors:
MAES JAN WILLEM
WITTE HILDE D
POMAREDE CHRISTOPHE
WITTE HILDE D
POMAREDE CHRISTOPHE
Application Number:
JP2006075410A
Publication Date:
November 09, 2006
Filing Date:
March 17, 2006
Export Citation:
Assignee:
ASM INC
International Classes:
H01L29/78; C23C16/42; H01L21/316; H01L21/318; H01L21/336; H01L21/822; H01L27/04; H01L29/786
Attorney, Agent or Firm:
Eiji Saegusa
Kakehi Yuro
Kenji Saito
Kakehi Yuro
Kenji Saito