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Title:
SILICON SUBSTRATE COMPOUND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3286921
Kind Code:
B2
Abstract:

PURPOSE: To provide a silicon substrate compound semiconductor device-related technique which is capable of reducing crystal dislocation density and the warping of a wafer and making feasible the enhancement in surface morphology.
CONSTITUTION: This invention relates to a compound semiconductor structure which grows a compound semiconductor on a silicon substrate. This compound semiconductor structure includes a first compound semiconductor, which is a GaAs layer 2 near the substrate 1, for example, an InAlGaAs layer 3 thereon or an InGaAs layer 4 or includes a heterostructure for a second compound semiconductor which comprises the InGaAs layer 4 and the InAlGaAs layer 3 in heterostructure. The second compound semiconductor has a larger lattice constant than the first compound semiconductor. What is more, the adopted film thickness is designed to exceed a critical film thickness in structure. Furthermore, the dislocation produced on the first compound semiconductor layer is concentrated in the interface between the first compound semiconductor and the second compound semiconductor and it is arranged to not penetrate the second compound semiconductor layer which grows thereon.


Inventors:
Tatsuya Ohori
Application Number:
JP4179793A
Publication Date:
May 27, 2002
Filing Date:
February 08, 1993
Export Citation:
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Assignee:
富士通株式会社
International Classes:
H01L21/20; H01L21/205; H01L21/338; H01L29/778; H01L29/812; (IPC1-7): H01L21/20; H01L21/205; H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
JP33364A
JP2125612A
JP1281719A
JP63186416A
JP296325A
JP2172899A
Other References:
J.Appl.Phys.,vol.70,no.9,p.4770−4778
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)



 
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