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Title:
SILICON THIN FILM FORMING METHOD BY CATALYST CVD METHOD, MANUFACTURE OF THIN FILM TRANSISTOR, AND THIN FILM TRANSISTOR
Document Type and Number:
Japanese Patent JP3453214
Kind Code:
B2
Abstract:

PURPOSE: To make it possible to produce a silicon thin film having a high mobility and an extremely thin film thickness at a low temperature by providing a low pressure in a reactor, increasing a proportion of other material gas to a silicon compound gas, and raising the temperature of catalyst body higher than the silicon melting temperature by increasing the electric power supplied to the catalyst.
CONSTITUTION: A raw material gas contains a silicon compound gas, for example, silane and other material gas such as hydrogen for instance. Pressure condition for the reactor 1 is a low pressure such as 0.05Torr., and the mixing ratio of the other material gas to the silicon compound gas is higher than the conventional ratio used. Also, the condition of electric power to be supplied to the catalyst body can be expressed by the temperature of the catalyst 3 equal to the silicon melting temperature (higher than 1,450°C, or higher than 1,700°C is more desired). When the conditions stated above are respectively fulfilled, a polycrystal silicon thin film with a film thickness of less than 0.1μm can be formed at a low temperature.


Inventors:
Hideki Matsumura
Koji Mimura
Application Number:
JP5576395A
Publication Date:
October 06, 2003
Filing Date:
March 15, 1995
Export Citation:
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Assignee:
Japan Science and Technology Agency
International Classes:
C30B25/10; C23C16/44; C30B25/14; H01L21/205; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): H01L21/205; C23C16/44; C30B25/10; C30B25/14; H01L21/336; H01L29/786
Domestic Patent References:
JP6340314A
JP60178621A
Attorney, Agent or Firm:
Fumihiro Hasegawa