To provide a slew rate control device and a slew rate control method that suppress EMI noise by performing a slew rate adjustment depending on the frequency of a clock signal in an output buffer of the clock signal.
The slew rate control device includes: a PLL circuit 24a having a voltage-controlled oscillator 15a for converting an input VCO input voltage Vi to a clock signal CK according to a conversion gain Gi; a voltage/current converter 19a for outputting a control current Ib having a positive correlation with each of the VCO input voltage Vi and the conversion gain Gi; a buffer control circuit 21a for setting a driving current according to the control current Ib; and an output circuit 22a for outputting a clock signal CKo in response to the driving current. A relationship can thus be established in which the drivability of the output circuit 22a increases in proportion to a frequency f of the clock signal CKo to determine an appropriate slew rate in accordance with the frequency f.
JP2000134081A | 2000-05-12 | |||
JPH07326949A | 1995-12-12 | |||
JP2002124867A | 2002-04-26 | |||
JP2002367376A | 2002-12-20 | |||
JP2008124687A | 2008-05-29 | |||
JP2000134081A | 2000-05-12 | |||
JPH07326949A | 1995-12-12 | |||
JP2002124867A | 2002-04-26 | |||
JP2002367376A | 2002-12-20 |
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