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Patent Searching and Data


Title:
SNUBBER CIRCUIT
Document Type and Number:
Japanese Patent JPH08168236
Kind Code:
A
Abstract:

PURPOSE: To obtain a highly efficient power converting apparatus by so constituting a snubber circuit that a signal that is turned on a predetermined time after a switching means is turned on and turned off when a predetermined time thereafter passes, will be output to a reverse switching means.

CONSTITUTION: A composite circuit 5 consists of a parallel circuit composed of a forward diode 51 and a reverse switching means 52; and a capacitor 53 connected in series therewith. It is then connected in parallel with a series circuit composed of a switching means 2 and a load 3. When the switching means 2 is turned on, a reverse switching means control signal generating means 6 produces on-signal output to the reverse switching means 52 after a predetermined time. It turns off the output when a predetermined time thereafter passes. When the switching means 2 interrupts a current to the load 3, energy stored in a wiring inductance Lw moves to the capacitor 53 through the forward diode 51, and is stored there. This prevents surges and obtains a highly efficient power converting apparatus.


Inventors:
NIWA SHOICHI
Application Number:
JP30596794A
Publication Date:
June 25, 1996
Filing Date:
December 09, 1994
Export Citation:
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Assignee:
FANUC LTD
International Classes:
H02P25/04; H02M1/00; H02M3/155; H02P27/06; (IPC1-7): H02M1/00; H02M3/155
Attorney, Agent or Firm:
Seiichi Samukawa