Title:
固体撮像装置及び距離画像測定装置
Document Type and Number:
Japanese Patent JP5171158
Kind Code:
B2
Abstract:
A pair of first gate electrodes IGR, IGL are provided on a semiconductor substrate 100 so that potentials Æ TX1 , Æ TX2 between a light-sensitive area SA and a pair of first accumulation regions AR, AL alternately ramp. A pair of second gate electrodes IGR, IGL are provided on the semiconductor substrate 100 so as to control the height of first potential barriers Æ BG each interposed between the first accumulation region AR, AL and a second accumulation region FDR, FDL, and increase the height of the first potential barrier Æ BG to carriers as a higher output of a background light is detected by a photodetector.
Inventors:
Mitsuto Mase
Seiichiro Mizuno
Mitsutaka Takemura
Seiichiro Mizuno
Mitsutaka Takemura
Application Number:
JP2007216517A
Publication Date:
March 27, 2013
Filing Date:
August 22, 2007
Export Citation:
Assignee:
Hamamatsu Photonics Co., Ltd.
International Classes:
G01C3/06; G01S7/4863; G01S7/51; G01S17/10; G01S17/894; H01L27/146; H04N5/3745
Domestic Patent References:
| JP4268764A | ||||
| JP63296266A | ||||
| JP2009047661A | ||||
| JP2009047660A | ||||
| JP2009047659A | ||||
| JP2009047658A | ||||
| JP2005235893A |
Foreign References:
| WO2007026777A1 | ||||
| WO2007055375A1 | ||||
| WO2008069141A1 | ||||
| WO2007119626A1 | ||||
| WO2007026779A1 |
Attorney, Agent or Firm:
Yoshiki Hasegawa
Shiro Terasaki
Satoru Ishida
Shiro Terasaki
Satoru Ishida