To provide a source driver circuit reducing chip areas and having efficient layout.
A plurality of source amplifiers Do are provided on each of a plurality of data lines, generate a drive voltage corresponding to brightness data indicating brightness of pixels, and supply corresponding data lines. Output terminals 20 of each source amplifier are connected to the corresponding data lines. High side transistors are provided between a power source line 22 and the output terminals 20. Low side transistors are provided between a grounding line 24 and the output terminals 20. First capacitors C1 are provided between the output terminals 20 and a gate of the high side transistors. Second capacitors C2 are provided between the output terminals 20 and a gate of the low side transistors. Each pad PAD functioning as the output terminals 20 of each source amplifier Do is arranged along one side 32 of a semiconductor substrate 30 integrating source drivers. The first capacitors C1 and the second capacitors C2 are arranged along one side 32 at positions adjacent to the pad PAD.
UEMURAI AKIO
JP2007286525A | 2007-11-01 | |||
JP2006072368A | 2006-03-16 | |||
JPS62230206A | 1987-10-08 | |||
JPH09284064A | 1997-10-31 | |||
JPH1079653A | 1998-03-24 |
Masaki Taiki
Next Patent: METHOD FOR SEPARATING DISPLAY MODULE AND/OR OPTICAL MEMBER