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Title:
STATUS CONFIRMING CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS59177647
Kind Code:
A
Abstract:

PURPOSE: To execute a sure control by detecting RDY turn-on of the status of a device to be controlled by a controller when a maximum delay time τ, which can elapse during the time from write of preceding data to RDY turn-off, elapses.

CONSTITUTION: A CPU1 issues commands from a communication control part 2 in accordance with a program in a memory 3 to write data in a terminal 8 through buffers A and B constituting an interface device 4. Data is written from the CPU1 into the buffer A in parallel and is written in the buffer B in serial and is sent to the terminal 8 in serial. In case of the next write of the CPU1, said maximum time τ is set after write of preceding data, and RYD turn-on/off is detected when this delay time τ elapses. Thus, the control is executed surely and accurately.


Inventors:
KISHINO TAKUMI
SHIMOMICHI KAZUO
KOBAYASHI MASAAKI
HOSHINO TOMOHARU
MATSUZAKI YUUJI
Application Number:
JP5199883A
Publication Date:
October 08, 1984
Filing Date:
March 28, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03M9/00; G06F5/06; G06F13/00; G06F13/42; H04L29/02; (IPC1-7): G06F3/00; G06F3/04; G06F5/04; G06F5/06; H04L13/00
Domestic Patent References:
JPS5719822A1982-02-02
JPS55138942A1980-10-30
Attorney, Agent or Firm:
Fumihiro Hasegawa



 
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