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Title:
STORAGE DEVICE AND ITS SELF-TEST METHOD
Document Type and Number:
Japanese Patent JP2008108326
Kind Code:
A
Abstract:

To provide a storage device and its self-test method in which circuit correction can be prevented and a manufacturing cost can be reduced even when a test process is changed.

The memory device is provided with a nonvolatile memory 11 storing process items, a parameter start address PA, and parameters in which an address corresponds to the parameter start address and the process items are prescribed, and a control circuit 12 constituted so that the test process conformed to the process items prescribed in the parameters is performed for the nonvolatile memory, in the same chip.


Inventors:
SUZUKI TAKAHIRO
FUJISAWA SHINYA
HASHIMOTO SHOICHIRO
HARA NORIMASA
Application Number:
JP2006288976A
Publication Date:
May 08, 2008
Filing Date:
October 24, 2006
Export Citation:
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Assignee:
TOSHIBA CORP
TOSHIBA INFORMATION SYS JAPAN
International Classes:
G11C29/12; G06F12/16; G11C16/02
Domestic Patent References:
JP2004239760A2004-08-26
JP2004333246A2004-11-25
JP2004030765A2004-01-29
JPH09289234A1997-11-04
JPH0817880A1996-01-19
JP2000321332A2000-11-24
JPH05143474A1993-06-11
JP2007164839A2007-06-28
JP2002352600A2002-12-06
JPH11202028A1999-07-30
JP2006085769A2006-03-30
Foreign References:
WO2004086411A12004-10-07
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto