PURPOSE: To attain a storage device suitable for large scale circuit integration with less number of input/output pins and possible for error correction, parallel readout, full write and partial write in an efficient way, by providing an interface of bus constitution in common use of input/output data lines.

CONSTITUTION: A data control section 2 is connected via a bidirectional bus, a bus driver 4, and a bus receiver 5 without confliction of the 1st data 25 with input/output data, and the data control section 2 is connected to an output terminal of the 2nd data 26 being the write data and an input terminal of the 3rd data 27 being readout data with the 1st and the 2nd memory modules 3-1, 3-2 via a buffer 6, the readout data and write data lines of the 1st and the 2nd memory modules 3-1, 3-2 are provided separately, then they are connected with the high-order device through bus structure, which is suitable for the interleaving of parallel readout/write, and in constituting the data control section 2 of large scale circuit integration ewpecially, the input/output terminals of the 1st W the 3rd data 25W27 are used effectively and efficiently.