Title:
リードレスマルチダイキャリアの構造およびその作製のための方法
Document Type and Number:
Japanese Patent JP2004537849
Kind Code:
A
Abstract:
One disclosed embodiment comprises a substrate having a top surface for receiving two or more semiconductor dies. The disclosed embodiment further comprises a printed circuit board attached to a bottom surface of the substrate and at least one via in the substrate. The at least one via provides an electrical connection between a signal bond pad of a first semiconductor die and the printed circuit board. The at least one via provides an electrical connection between a first substrate bond pad and the printed circuit board. The first substrate bond pad is connected to the first signal bond pad of the first semiconductor die by a first signal bonding wire. The at least one via also provides an electrical connection between the first signal bond pad of the first semiconductor die and a first land that is electrically connected to the printed circuit board.
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Inventors:
Hashemie, Hassan Es
Coat, kevin jay
Coat, kevin jay
Application Number:
JP2003509827A
Publication Date:
December 16, 2004
Filing Date:
June 27, 2002
Export Citation:
Assignee:
SKYWORKS SOLUTIONS,INC.
International Classes:
H01L23/36; H01L23/367; H01L23/498; H01L23/64; H01L25/04; H01L23/12; H01L25/065; H01L25/18; (IPC1-7): H01L25/04; H01L23/12; H01L23/36; H01L25/18
Domestic Patent References:
| JPH08172141A | 1996-07-02 | |||
| JPH0955459A | 1997-02-25 | |||
| JPH0513610A | 1993-01-22 | |||
| JPH11176987A | 1999-07-02 | |||
| JP2000188359A | 2000-07-04 | |||
| JPH0758253A | 1995-03-03 |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai