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Title:
SUB-BAND ECHO ERASING METHOD
Document Type and Number:
Japanese Patent JP3707572
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To accelerate convergence speed by respectively dividing a received signal and an echo signal into N pieces of frequency bands, synthesizing echo erasure error signals in the N pieces of frequency bands and generating the transmissive signals of all frequencies for which the echo signal is suppressed.
SOLUTION: A received signal X(t) is reproduced into a voice by a speaker 2, converted to a digital signal inside a frequency band dividing part and divided into N pieces of real number signals Xk(m) (k=0,1...N-1) by frequency bands later. The respective frequency bands divided by the frequency band dividing part have pseudo echo paths 6k. The respective pseudo echo paths 6k generate pseudo echo signals Y'k(m) and subtracters 8k subtract these pseudo echo signals Y'k(m) from echo signals Yk(m) of correspondent frequency bands so that the echo signals Yk(m) can be erased. The pseudo echo paths 6k are corrected by being estimated by estimation parts 11k using a projection method, etc., so that the residual can be approximate to '0'. The respective error signals are synthesized by a frequency band synthesizing part 53.


Inventors:
Shoji Makino
Yoichi Haneda
Akira Nakagawa
Masashi Tanaka
Suehiro Shimauchi
Junji Kojima
Application Number:
JP9552396A
Publication Date:
October 19, 2005
Filing Date:
April 17, 1996
Export Citation:
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Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
H03H21/00; H04B3/23; (IPC1-7): H04B3/23; H03H21/00
Domestic Patent References:
JP4123621A
JP6318885A
JP5244043A
Attorney, Agent or Firm:
Naoki Nakao
Yukio Nakamura
Taku Kusano