Title:
SUBSTRATE TREATMENT DEVICE AND SUBSTRATE TREATMENT METHOD
Document Type and Number:
Japanese Patent JP3916468
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a substrate treatment device and a substrate treatment method capable of continuing the treatment of a substrate when a trouble occurs in an inspection device and a measuring device.
SOLUTION: A resist coating/developing system 1 comprises a cassette station 11, a treatment station 13 and an inspection station 12. The inspection station 12 has, for example, a defect inspection unit (ADI), a dummy inspection unit (DMM-A), a bypass inspection unit (BMM-A), and a main wafer conveyor 31. In the case that the sampling inspection of a wafer W is carried out, when the defect inspection unit (ADI) is broken down, inspection wafers W are mounted on the bypass inspection unit (BMM-A), and the remaining wafers excluding the inspection wafers W are mounted on the dummy inspection unit (DMM-A) in accordance with the order conveyed to the inspection station 12. Then, the wafers W are conveyed out to the cassette station 11 in the order conveyed in to the inspection station 12.
Inventors:
Norio Senba
Ryo Miyata
Ryo Miyata
Application Number:
JP2002004971A
Publication Date:
May 16, 2007
Filing Date:
January 11, 2002
Export Citation:
Assignee:
東京エレクトロン株式会社
International Classes:
B65G49/07; H01L21/677; B05C11/02; G03B27/32; G03C5/00; G03D5/00; H01L21/00; H01L21/027; H01L21/68; (IPC1-7): H01L21/68; B65G49/07; H01L21/027
Domestic Patent References:
| JP11186358A | ||||
| JP11238776A | ||||
| JP9293767A | ||||
| JP11087457A |
Attorney, Agent or Firm:
Hiroshi Takayama