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Patent Searching and Data


Title:
SUBSTRATE-VOLTAGE GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPH01260848
Kind Code:
A
Abstract:

PURPOSE: To decrease power consumption of an integrated circuit at a standby time and to bias a semiconductor substrate using a large current at the time of operation, by intermittently operating two voltage generating means at two voltage levels.

CONSTITUTION: Two substrate-voltage generating circuits are provided. One circuit is composed of inverters 1a∼8a, a NOR gate 9a, a capacitor 10a, n- channel MOS transistors 11a and 12a and a voltage level detector 13a. The other circuit is composed on inverters 1b∼8b, a NOR gate 9b, a capacitor 10b, n-channel MOS transistors 11b and 12b and a voltage level detector 13b. The threshold voltage value of one level detector 13a is set at a value larger than the threshold voltage value of the other level detector 13b. The sizes of the inverters 1a∼8a, the NOR gate 9a, the capacitor 10a and the MOS transistors 11a and 12a are set at the values smaller than the values of the sizes of the inverters 1b∼8b, the NOR gate 9b, the capacitor 10b and the MOS transistors 11b and 12b.


Inventors:
OZAKI HIDEYUKI
Application Number:
JP8942388A
Publication Date:
October 18, 1989
Filing Date:
April 12, 1988
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/04; G11C11/407; G11C11/408; H01L21/822; H03K19/094; (IPC1-7): H01L27/04
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)