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Patent Searching and Data


Title:
SUPERVISOR CALL INSTRUCTION EXECUTION SYSTEM
Document Type and Number:
Japanese Patent JPH02194441
Kind Code:
A
Abstract:

PURPOSE: To improve the performance of an supervisor call (SVC) instruction by storing the copies of an SVC index table address in a rated area on a memory and an SVC index number upper limit into an exclusive register.

CONSTITUTION: When a flip-flop 120 in an SVC instruction control part 119 is in a reset state, the address of the rated area on the memory is set from a data arithmetic part through an address line 107 to a register 103. The SVC index table address in the rated area on the memory and the upper limit of the SVC index number are read through an address adder 108, register 109, TLB part 110, register 111, cache part 112 and register 102 to be stored in a register 101 and the flip-flop 120 is set. Thus, since the following processing of the SVC instruction can be executed by using the SVC index table address and the upper limit of the SVC index number in the register 101 without executing a memory access, the performance of the SVC instruction is improved.


Inventors:
ITO MIKIO
Application Number:
JP1308689A
Publication Date:
August 01, 1990
Filing Date:
January 24, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F9/46; (IPC1-7): G06F9/46
Attorney, Agent or Firm:
Tan Ashida (2 outside)