To suppress generation of a fault of dislocation to be observed in the case of flip chip bonding by forming a metallic pattern outside an area of a comb line electrode formed on the other main surface of at least two comb line electrodes arranged opposite to each other and piezoelectric substrates consisting of a metallic thin film formed on one main surface of the piezoelectric substrate.

An IDT electrode 2, electrode 3, 3' for connecting bump and a gold bump 4 are formed on one main surface of the piezoelectric substrate 1. An IDT electrode 2 pattern is formed by photolithography, after forming an Al-Si alloy film by sputtering. An Al pattern 5 is formed by the photolithography as well as the IDT electrode pattern 2. The gold bump 4 is formed on the rear side of a wafer after forming the IDT electrode pattern on the front surface of the wafer by a photoetching process. The electrode for connecting bump is used as it is as a recognition pattern on the side of the IDT electrode 2 in the case of bump bonding.