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Title:
SURFACE TREATMENT OF FRAME FOR SEMICONDUCTOR ELEMENTS
Document Type and Number:
Japanese Patent JPS63111655
Kind Code:
A
Abstract:

PURPOSE: To eliminate the rough surface of the conductive layer of a frame and improve the adhesion strength of molding resin by a method wherein the frame is supplied to the assembly process of a semiconductor device while the foundation layer of the frame is left as a protective layer.

CONSTITUTION: A thin plate stripe 16, i.e. a frame 1 is fed into a plating bath 12 to form a foundation layer 9 over the whole surface of the frame 1. This foundation layer 9 is composed of a copper plating layer which has good adhesiveness with the base of the frame 1. After the foundation layer 9 is formed, the frame 1 is washed with flowing water in a washing bath 13 and then a conductive layer 17 is formed. The conductive layer 17 is formed by feeding the thin plate stripe 16 into a plating bath 14 and, before the feeding, a predetermined mask is applied to the frame 1 to form the conductive layer 17 on the predetermined region of the frame 1 only. The conductive layer 17 is composed of a gold plating layer or a silver plating layer and, as the conductive layer 17 is formed on the frame 1 with the foundation layer 9 between, the conductive layer 17 adheres solidly to the frame 1. Then the thin plate stripe 16 on which the conductive layer 17 is formed is washed with flowing water in a washing bath 15 and supplied to a semiconductor device manufacturing process in a form of being wound into a reel.


Inventors:
KUDO MASAHIDE
Application Number:
JP25907186A
Publication Date:
May 16, 1988
Filing Date:
October 30, 1986
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L23/50; H01L21/56; (IPC1-7): H01L21/56; H01L23/50
Domestic Patent References:
JPS5141961A1976-04-08
JPS53141577A1978-12-09
Attorney, Agent or Firm:
Kazuo Sato