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Patent Searching and Data


Title:
SWEEP SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5843616
Kind Code:
A
Abstract:

PURPOSE: To remarkably reduce a synchronizing jitter, by adding a feedback resistance in order to use a hold-off transistor as a shunt feedback amplifier, and providing a coupling circuit between said transistor and an input terminal.

CONSTITUTION: In order to use a hold-off transistor 6 as a shunt feedback amplifier instead of an emitter-ground amplifier, a feedback resistance RF is added, and a coupling circuit 10 consisting of a series circuit of a capacitor CB and a resistor RB is provided between an input terminal 1 and the base of the transistor 6. According to such constitution, in case of a synchronizing signal of high frequency which is sufficiently shorter than a sweep time and a hold-off period, a time from the end of the hold-off period to restarting of sweep can be made constant in accordance with a period of the synchronizing signal, the influence of a transient response noise by a variation time of a trigger pulse and a hold- off circuit 9 can be made invariable by a constant timing, and a synchronizing jitter can be reduced remarkably.


Inventors:
OOTA GENICHIROU
SUZUKI SATORU
BABA SUEO
HAYASHI SHIGERU
Application Number:
JP14271581A
Publication Date:
March 14, 1983
Filing Date:
September 09, 1981
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K4/50; G01R13/24; H03K4/502; H03K4/90; (IPC1-7): H03K4/08
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)