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Patent Searching and Data


Title:
SWITCH MATRIX
Document Type and Number:
Japanese Patent JP2000032508
Kind Code:
A
Abstract:

To suppress the deviation of a gain at the time of conducting between input and output terminals by providing an amplifier for compensating a loss deviation between the input and output terminals different in path length of a switch matrix to an input line, an output line or both of those lines.

A switch matrix has an amplifier 25 provided on both of input and output lines. This amplifier 52 is equipped with a matching inductor 53 and a matching resistance 54. A signal wave inputted from an input/output terminal 1 lowers a level of the signal wave by a resistance element of a unit switch 11 or a line loss as the wave passes several input/output matching inductors 5 and an intersection part 12 of the input/output lines. The level of the signal waves becomes lower with regard to an output line 4 as well. A gain of the amplifier 52 provided to input lines 2 and 4 is set so that the level of the signal wave to be inputted or the level of the signal wave to be outputted becomes equal in any unit switch 11. Thus, a deviation occuring to the level of the signal wave to be outputted to each output terminal 3 is prevented.


Inventors:
SHIGEMATSU TOMONORI
ITO KENJI
IIDA AKIO
Application Number:
JP12161699A
Publication Date:
January 28, 2000
Filing Date:
July 30, 1993
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01P1/15; H03K17/00; H03K17/693; H04Q3/52; (IPC1-7): H04Q3/52; H01P1/15; H03K17/00; H03K17/693
Attorney, Agent or Firm:
Kenji Yoshida (2 outside)