To make reduce a circuit chip area and furthermore to improve high frequency characteristic at making a circuit integrated.
A switched capacitor filter 1 is formed of a coefficient switched capacitor 3i, a delaying switched capacitor 5ij and an integrator 6. The integrator 6 is formed of an arithmetic amplifier 8 and plural integration switched capacitors 71k for an arithmetic amplifier to be connected between the output terminal of the amplifier 8 and the inverse inputting terminal of the amplifier 8. The capacitor 3i weights the n-th root of a transfer function coefficient value to a signal from an inputting terminal part 2. The switched capacitor 5ij for delaying/coefficient delays by a prescribed time with respect to a signal from an output terminal part 4 and additionally weights the n-th root of the transfer function coefficient value. Then, the capacitance of the internal capacitor of the switched capacitors 3i and 5ij is a value in proportion to the n-th root of the transfer function coefficient value.
MORI RIKAN
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