To improve the S/N of each output signal from each switched capacitor filter(SCF) even when plural SCFs are assembled on a same board.

The filter is provided with plural SCFs 8a, 8b with the same filter characteristic receiving input signals a1, a2 via input signal lines 12a, 12b, a clock signal generating circuit 10 giving a clock signal of the same frequency to specify the filter characteristic of each SCF, a power supply path 11 to supply a drive power supply to the clock signal generating circuit and each SCF, and a board 9 on which each SCF, the clock signal generating circuit and the input signal paths and the power supply path are mounted. In this case, a phase between the clock signals is shifted by a prescribed time or over depending on leading and trailing characteristic of the clock signal.