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Patent Searching and Data


Title:
SYNCHRONIZATION SEPARATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5789375
Kind Code:
A
Abstract:

PURPOSE: To reproduce stable pictures, by feeding back feedback pulse from a vertical deflectng circuit to the input side of a synchronizing separating circuit to stop the operation of the synchronization separating circuit for a short time.

CONSTITUTION: Feedback pulses from a vertical deflecting circuit 2 are fed back to the input side of a synchronizing separating circuit through a feedback circuit 3, where a diode D11, a resistance R11, and a parallel circuit consisting of a resistance R12 and a capacitor C12 are counted in series, to stop the operation of the synchronizing separating circuit for a short time. The parallel circuit consisting of the resistance R12 and the capacitor C12 is a bias generating circuit for taking out only vertical feedback pulses, and the resistance R11 is provided to set the magnitude of the pulse current to be fed back.


Inventors:
OGINO MASANORI
FUSHIMI KIYOSHI
Application Number:
JP16458380A
Publication Date:
June 03, 1982
Filing Date:
November 25, 1980
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04N5/08; H04N5/10; (IPC1-7): H04N5/10
Domestic Patent References:
JP46012810A