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Title:
SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPH05153111
Kind Code:
A
Abstract:

PURPOSE: To obtain a synchronizing circuit in which a preamble for synchronization is not necessitated to an input signal, and a synchronization can be speedily performed.

CONSTITUTION: A trigger signal is obtained from an input signal by an edge comparator 2, and a clock synchronizing with the input signal is outputted from an IC 7 for synchronization from both the trigger and a clock from a clock generator 6. The input signal is frame-synchronized by a shift register 3A based on the synchronized clock. And also, the synchronization of the synchronized clock with the frame-synchronized signal is confirmed by a magnitude comparator 8, a gate circuit 4 is controlled by the confirmed output, and the frame-synchronized signal is outputted.


Inventors:
KOBAYASHI AKIRA
IIMORI RYUICHI
Application Number:
JP34237291A
Publication Date:
June 18, 1993
Filing Date:
November 30, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03L7/00; H04L7/08; (IPC1-7): H03L7/00; H04L7/08
Attorney, Agent or Firm:
Suzuki Akio