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Title:
SYNCHRONIZING MULTIPLEXER
Document Type and Number:
Japanese Patent JPS6484931
Kind Code:
A
Abstract:

PURPOSE: To obtain a synchronizing multiplexer to synchronizingmultiplex a low order group signal without changing a transmitting speed by changing the attribute of a frame bit added to the low order group signal for the signal.

CONSTITUTION: In a case where the frame constitution of two inputted low order group signals CH1 and CH2 and the frame constitution of a synchronized multiple signal are made as shown on a figure, when respective frame bits of the low order, group signals CH1 and CH2 are an F and an F' and an information bit is indicated as an I, respective polarities of the frame pulses of the frame bit F and frame bit F', are set so as to be mutually reverse. In such a way, at a receiving side, a separation into two channels can be executed based on a difference in the frame bits.


Inventors:
KAMATA YOSHIKI
TAJIRI MITSUHIRO
Application Number:
JP24220787A
Publication Date:
March 30, 1989
Filing Date:
September 25, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04J3/06; (IPC1-7): H04J3/06
Attorney, Agent or Firm:
Naotaka Ide



 
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