PURPOSE: To prevent the wrong transition by providing a flip-flop which outputs a delayed clock to the input, a state transition circuit which causes a specific state transition to a state variable, and an output circuit which outputs a fixed logical function.

CONSTITUTION: A flip-flop 3 outputs the 1-p delayed clocks x1, x2...xp to an input (x). A state transition circuit 1 produces a state transition y (t+1)=f (xp(t), y(t)) to a state variable (y). Then an output circuit 20 outputs a logical function shown in w(x, go) by means of the logical function (go) which is decided by a recurrence formulas gp=y and gi-1=f (x1, g1) with inputs x, x1, x2...xp, y. Thus the input (x) is inputted to the circuit 1 through the flip-flop 3 of (p) stages. As a result, no wrong transition is produced even in a stable sample window.