Title:
SYNCHRONIZING SIGNAL DETECTING DEVICE
Document Type and Number:
Japanese Patent JPH0413279
Kind Code:
A
Abstract:
PURPOSE:To surely extract a synchronizing signal even when a little bit error occurs by using the characteristics of the input signal scramble processing of a CD-ROM. CONSTITUTION:The synchronizing signal is extracted by converting an input signal to parallel by a serial/parallel converting means 5 at the timing of the output of a word discrimination means 4 using a L/R discrimination signal, and detected by using a 0-section detection means 6 and a continuity discrimination means 8 including a majority processing. Namely, the synchronizing signal is extracted while noticing that the serial signal to be inputted as the CD-ROM signal is applied the scramble processing to average the power spectrum in the data part except the synchronizing signal so as to inhibit the appearance of long continuous 1 value or 0 value, and also the majority processing is used. Thus, the stable synchronizing signal can be detected even when a slight bit error occurs.
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Inventors:
FUJIE HIDEKI
Application Number:
JP11619490A
Publication Date:
January 17, 1992
Filing Date:
May 02, 1990
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11B20/14; H03M9/00; (IPC1-7): G11B20/14
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)
Next Patent: JPH0413280