Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SYNCHRONIZING SYSTEM FOR BUILT-IN CLOCKS
Document Type and Number:
Japanese Patent JPH04276591
Kind Code:
A
Abstract:

PURPOSE: To constitute an accurate interlocking system by eliminating error of clocks contained in respective devices when synchronization of each device is conducted using clocks contained in each device in an interlocking system and the like consisting of a plurality of devices such as video and audio systems.

CONSTITUTION: The time data of the clock contained in a master VTR 1 is transmitted to each slave VTR 2 by way of a remote control transmission cable 3 and the clocks contained in respective VTR are synchronized using a second synchronization signal cable 4.


Inventors:
YAMAMOTO TETSUYA
Application Number:
JP3701791A
Publication Date:
October 01, 1992
Filing Date:
March 04, 1991
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
G04C11/04; G04G7/00; (IPC1-7): G04C11/04; G04G7/00
Attorney, Agent or Firm:
Uchihara Shin



 
Previous Patent: 無機質板の製造装置

Next Patent: 熱板装置