Title:
SYNCHRONOUS RECTIFYING CONVERTER
Document Type and Number:
Japanese Patent JP2000156974
Kind Code:
A
Abstract:
To prevent an overvoltage from being applied to the gate of an FET and becoming damaged, in a synchronous rectifying converter using the FET for secondary side rectification.
A series connection circuit of a capacitor 8 for driving a gate and a Zener diode 9 for preventing overvoltage are connected between the connection point of a transformer 5 and a chock coil 11 and the source of a synchronous rectifying FET 7. The connection point of the capacitor 8 and the Zener diode 9 is connected with the gate of the FET 7. As a result, overvoltage can be prevented from being applied to the gate of the FET 7 and prevention of damages takes effect.
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Inventors:
NAGATA TATSUYA
TOUCHI KOJI
MATSUYOSHI MARI
TOUCHI KOJI
MATSUYOSHI MARI
Application Number:
JP32968498A
Publication Date:
June 06, 2000
Filing Date:
November 19, 1998
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H02M7/21; H02M3/28; (IPC1-7): H02M3/28; H02M7/21
Attorney, Agent or Firm:
Masami Akimoto
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