Title:
SYSTEM FOR INPUTTING CIRCUIT DIAGRAM
Document Type and Number:
Japanese Patent JPS6441974
Kind Code:
A
Abstract:
PURPOSE:To facilitate the work of a circuit diagram input by preparing logic connecting information in parallel at the time of inputting a circuit diagram, executing a time-consuming processing relating to logic connecting preparation in the intervals of visual instructions, and evaluating the flow of a signal while inputting the circuit diagram. CONSTITUTION:A preparing means 3 prepares the logic connecting information of components and wiring to connect them on a circuit diagram by an instruction from an instruction input means 1. Graphic information and the logic connecting information prepared by the preparing means 3 are registered into a storage area by a registering means 4. A control means 2 decides the instruction not to influence the logic connecting information on a conversation type operating speed from the input instruction from the instruction input means 1 and controls the activation of the preparing means 3 in accordance with the deciding result. At evaluating means 5 evaluates the validity of the flow of the signal on a system by the control means 2.
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Inventors:
YAMAGUCHI TAKASHI
Application Number:
JP19761787A
Publication Date:
February 14, 1989
Filing Date:
August 07, 1987
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F17/50; (IPC1-7): G06F15/60
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)