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Patent Searching and Data


Title:
SYSTEM FOR MEASURING APPEARANCE FREQUENCY OF INSTRUCTION
Document Type and Number:
Japanese Patent JPH0322044
Kind Code:
A
Abstract:

PURPOSE: To quickly measure delicate data of the instruction frequency distribution or the like for each user application in actual circumstances by queuing the code of an instruction whose number of clocks is beyond a prescribed number of clocks is beyond a prescribed number of clocks, and providing a means which counts the total sum of instructions whose processing requires clocks the number of which is smaller than the prescribed number

CONSTITUTION: The number of clocks which is counted by a clock counting means 4 and is required for the processing of an instruction is compared with contents of a clock number setting means 5 by a comparing means 6. When the number of clocks required for the executed instruction is equal to or larger than the prescribed value, the code of the executed instruction is queued in a queuing mechanism 2; but when it is smaller than the prescribed value, an instruction number counting means 7, for example, a counter is counted up. Instruction codes queued in the queuing mechanism 2 are classfied and summed up by a recording mechanism 3. Thus, fine data like the instruction frequency distribution or the like of each user application is quickly measured in actual circumstances.


Inventors:
SHINKAI MICHINORI
TONE HIROSADA
Application Number:
JP15584489A
Publication Date:
January 30, 1991
Filing Date:
June 20, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/38; G06F11/34; (IPC1-7): G06F9/38; G06F11/34
Attorney, Agent or Firm:
Takashi Honma