Title:
SYSTEM AND METHOD FOR DETECTING FAULT OF TIMER AND RECORDING MEDIUM RECORDING PROGRAM FOR EXECUTING THE SAME
Document Type and Number:
Japanese Patent JPH1165986
Kind Code:
A
Abstract:
To detect faults at two timers respectively.
When the interruption of a timer 1 occurs, a microprocessing unit(MPU) 3 turns on a flag 10 and resets the timer 1. When the interruption of a timer 2 occurs later, the flag is turned off. When the flag is turned on at the time of 2nd interruption from the timer 1, the MPU 3 judges the occurrence of a fault at the timer 2 and when the flag 10 is turned off at the time of interruption at the timer 2, the occurrence of a fault at the timer 1 is judged.
Inventors:
YOSHIDA TADAAKI
Application Number:
JP23012397A
Publication Date:
March 09, 1999
Filing Date:
August 27, 1997
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F11/30; G06F1/04; G06F13/24; (IPC1-7): G06F13/24; G06F1/04; G06F11/30
Attorney, Agent or Firm:
Yanagi Kawa Shin