Title:
ニューラルネットワークにおけるビット直列計算についてのシステム及び集積回路
Document Type and Number:
Japanese Patent JP7166389
Kind Code:
B2
Abstract:
A system for bit-serial computation in a neural network is described. The system may be embodied on an integrated circuit and include one or more bit-serial tiles for performing bit-serial computations in which each bit-serial tile receives input neurons and synapses, and communicates output neurons. Also included is an activation memory for storing the neurons and a dispatcher. The dispatcher reads neurons and synapses from memory and communicates either the neurons or the synapses bit-serially to the one or more bit-serial tiles. The other of the neurons or the synapses are communicated bit-parallelly to the one or more bit-serial tiles, or according to a further embodiment, may also be communicated bit-serially to the one or more bit-serial tiles.
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Inventors:
Judo, patrick
Alberio, Giorgi
Delmas Lascorz, Alberto
Andreas Moshovos
Sharifi Mohadam, Saiyan
Alberio, Giorgi
Delmas Lascorz, Alberto
Andreas Moshovos
Sharifi Mohadam, Saiyan
Application Number:
JP2021087474A
Publication Date:
November 07, 2022
Filing Date:
May 25, 2021
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
G06N3/063; G06F7/504
Domestic Patent References:
| JP6052132A | ||||
| JP7210533A |
Foreign References:
| US5444822 | ||||
| EP0664516A2 |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Tadahiko Ito