Title:
タップ係数設計方法及びタップ係数設計装置
Document Type and Number:
Japanese Patent JP4945955
Kind Code:
B2
Abstract:
A method determines tap coefficients of a phase interpolation finite impulse response (FIR) filter with respect to a digital-signal phase-locked loop processing apparatus including an A/D converter receiving a reproduced signal serving as digital data and sampling the received reproduced signal at a frequency higher than a data rate frequency and a PLL portion performing phase locking of the reproduced signal by filtering the sampled reproduced signal obtained by the A/D converter using the phase interpolation FIR filter and outputting a data sequence of the phase-locked reproduced signal. The method includes providing an adaptive equalization FIR filter at the data rate frequency at a stage subsequent to the PLL portion and determining the tap coefficients of the phase interpolation FIR filter using, as estimated values, FIR filter tap coefficients of the adaptive equalization FIR filter, which are converged so as to achieve a minimum mean square error.
Inventors:
Kajiwara Yoshiyuki
Application Number:
JP2005239034A
Publication Date:
June 06, 2012
Filing Date:
August 19, 2005
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H04L7/033; G11B20/10; H03H17/06; H03H21/00
Domestic Patent References:
| JP2001195830A | ||||
| JP2002008315A |
Foreign References:
| WO2004051648A1 |
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga
Eiichi Tamura
Seiji Iga