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Title:
TAPE FOR ASSEMBLING SEMICONDUCTOR PRODUCT
Document Type and Number:
Japanese Patent JP2011018767
Kind Code:
A
Abstract:

To provide a tape for assembling a semiconductor product capable of suppressing even the risk of adhesive deposit, while suppressing the risk of deteriorating adhesiveness between a semiconductor chip and a die pad surface and the adhesiveness between the semiconductor chip and a bonding wire, in a die bonding process and a wire bonding process.

In the tape for assembling the semiconductor product configured so that an adhesive layer is formed on a heat-resistant base material sheet surface, the adhesive layer is a cured material of a composition for adhesive layer forming containing a thermosetting polyimide system resin composition and an antioxidant. With the tape for assembling the semiconductor product, it is possible to suppress even the risk of adhesive deposit, while suppressing the risk of deteriorating the adhesiveness between the semiconductor chip and the die pad surface and the adhesiveness between the semiconductor chip and the bonding wire, in the processes of die-bonding and wire bonding.


Inventors:
IMAMURA SHIGEKI
Application Number:
JP2009162267A
Publication Date:
January 27, 2011
Filing Date:
July 08, 2009
Export Citation:
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Assignee:
DAINIPPON PRINTING CO LTD
International Classes:
H01L21/56; C09J5/00; C09J7/02; C09J179/08
Attorney, Agent or Firm:
Isamu Hosoi
Tasuke Sato
Yukiko Kurita



 
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