Title:
TASK PROCESSING DEVICE
Document Type and Number:
Japanese Patent JP2019003710
Kind Code:
A
Abstract:
To efficiently execute and control a task in a multicore system.SOLUTION: A plurality of tasks is executed simultaneously in a plurality of CPUs. A task control circuit is connected to the plurality of CPUs, and when executing a system call instruction, each CPU transmits a system call signal to the task control circuit. Upon receipt of a system call signal from a CPU 0, the task control circuit 200 refers to a processor management register, identifies a RUN-task of the CPU 0, selects a READY-task that is to be executed next, switches process data of the RUN-task and process data of the READY-task, and updates processor management information.SELECTED DRAWING: Figure 48
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Inventors:
MARUYAMA NOBUTAKA
Application Number:
JP2018195064A
Publication Date:
January 10, 2019
Filing Date:
October 16, 2018
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G06F9/30; G06F9/48
Attorney, Agent or Firm:
Patent corporation Interbrain