PURPOSE: To save the power consumption, by supplying a high-speed clock signal while a telephone terminal device is busy and then supplying a low-speed clock signal while the telephone terminal device is idle.
CONSTITUTION: A processor PR contains counters N1 and N2 corresponding to clock generators CLK1 and CLK2 respectively and is driven by the clock signal supplied from the generator CLK1 or CLK2 corresponding to the counter N1 or N2 which is set at logical value 1. Then the PR always monitors the working state of a telephone terminal device and sets the counters N1 and N2 at logical value 0 and 1 respectively in an idle mode and drives a timepiece counter CNT with a low-speed clock signal supplied from the generator CLK2 to perform a display of time.
MORI HIROYUKI
HIROSE NORIMASA
MURAI ATSUYA
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