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Title:
TELEVISION PICTURE RECEIVER
Document Type and Number:
Japanese Patent JPS5744380
Kind Code:
A
Abstract:

PURPOSE: To eliminate noise securely while preventing lockout, by making noise elminating operation inactive during a vertical fly-back period by a vertical oscillation pulse with regard to at least the AGC circuit of the noise eliminating circuit of a TV receiver.

CONSTITUTION: For example, the output of the video amplifying circuit 5 of a TV receiver is inputted to circuits 7 and 8. The noise eliminating circuit 7 detects a noise by a fixed noise detection level and inverts and transfers it to an output buffer circuit 6 to cancel it with noise in an output video signal, thus performing noise eliminating operation. As for an AGC detecting circuit 8, a noise detection output is added to a synchronizing pulse detection output inverted by the AGC detecting circuit to cancel a noise contained in it. On the other hand, the oscillation pulse of a vertical oscillating circuit 15 stops the noise eliminating operation of the noise eliminating circuit 7 during a vertical fly-back period. Consequently, while lockout is prevented by an IC circuit having a high degree of integration, noise eliminating operation is performed securely.


Inventors:
TONOMURA KENICHI
KADOKAWA SHIGERU
OOSAWA MICHINAO
Application Number:
JP11833280A
Publication Date:
March 12, 1982
Filing Date:
August 29, 1980
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MICROCUMPUTER ENG
International Classes:
H04N5/21; H04N5/213; H04N5/52; (IPC1-7): H04N5/48
Domestic Patent References:
JPS53118925A1978-10-17
JPS54101246A1979-08-09