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Title:
I/O TERMINAL, PACKAGE FOR CONTAINING SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2002280473
Kind Code:
A
Abstract:

To enhance transmission characteristics by protecting the I/O terminals of a semiconductor package effectively against damage thereby keeping a good transmission efficiency of high frequency signal between a semiconductor element and an external electric circuit board.

The I/O terminal comprises a planar part 1 of a substantially rectangular dielectric plate having a line conductor 1a formed on the upper surface from one side to the opposite side and ground conductors 1b formed on the opposite sides of the line conductor 1a at a constant interval in flush with the line conductor 1a, and a dielectric standing wall part 2 bonded to the upper surface of the planar part 1 with the line conductor 1a between. The standing wall part 2 is provided with a cut 2c, surrounding the line conductor 1a, at the lower end part of the opposite side faces facing the direction substantially perpendicular to the transmitting direction of the line conductor 1a and a ground conductor layer 2d is formed on the inner surface substantially parallel with the transmitting direction of the cut 2c.


Inventors:
OGASAWARA ATSUSHI
Application Number:
JP2001077068A
Publication Date:
September 27, 2002
Filing Date:
March 16, 2001
Export Citation:
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Assignee:
KYOCERA CORP
International Classes:
H01L23/02; H01P5/08; (IPC1-7): H01L23/02; H01P5/08
Domestic Patent References:
JPH11176988A1999-07-02
JPS54117683A1979-09-12