Title:
TEST DEVICE
Document Type and Number:
Japanese Patent JP3444668
Kind Code:
B2
Abstract:
PURPOSE: To provide a test device whose operation is simple and which can reduce labor and time necessary to initially set up a control device by a customer.
CONSTITUTION: An IC tester contains two or more hierarchy operation levels allocated to one of physical or logical entities in which a device to be tested is arranged, and a test level controller 10 is arranged in the IC tester, and step-up is applied so as to perform a sequence of an operation step composed of a pre-activity task sequence 12, a call 13 to the low hierarchy operation levels and a return 14 from the low hierarchy operation levels, and a sequency of the operation step is performed in descending order by the test level controller 10 on the device to be tested from the divided physical or logical entities, and the lowest hierarchy operation level of the device to be tested is processed by a device test processor.
Inventors:
Malo Langhof
Alfred Biver
Alfred Biver
Application Number:
JP25119294A
Publication Date:
September 08, 2003
Filing Date:
September 20, 1994
Export Citation:
Assignee:
AGILENT TECHNOLOGIES, INC.
International Classes:
G01R31/00; G01R31/28; H01L21/66; G01R31/26; (IPC1-7): G01R31/28; G01R31/26; H01L21/66
Domestic Patent References:
| JP582761A |
Other References:
【文献】欧州特許出願公開296884(EP,A2)
Attorney, Agent or Firm:
Taira Hagino (5 outside)
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