PURPOSE: To provide a test pattern generator which can arbitrarily set rising and falling times with a simple structure and generate a test pattern at the timing using a simulator at the time of designing.

CONSTITUTION: A memory 100 outputs pattern data and delay amount data of an address value supplied from an address counter 102. A delay counter 104 receives the delay amount data, and generates a delay signal after a time corresponding to the delay amount data is elapsed. The counter 102 which generates an address to the memory 100 maintains the address value constant when the delay signal is not input from the counter 104, and increases the value when the signal is input.