To provide a test system for semiconductor having means for detecting a glitch contained in the output signal from a device being tested in order to evaluate the characteristics thereof accurately.
The test system for semiconductor comprises an event memory storing the timing data for the event of a signal for testing a device, an event generator generating a signal for testing a device, i.e., a test pattern, based on event data from the vent memory, a strobe signal and an expected value pattern, a pattern comparator for comparing the output signal from a pin electronics with the expected value pattern and generating an NG signal if they do not match each other, and a unit for detecting a glitch by counting the number of edges of the output signal and comparing it with an expected value.
| JPH01296168 | LOGIC ANALYZER |
| JP3593405 | Multiplexed electronic test probe |
RAJUSMAN ROCHIT
TURNQUIST JAMES ALAN
SUGAMORI SHIGERU
