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Title:
TESTING SYSTEM
Document Type and Number:
Japanese Patent JPS5384753
Kind Code:
A
Abstract:

PURPOSE: To make possible testing of the apparatus to be tested having a multiplicity of pins through the use of an existing testing apparatus having only a relatively few test pins by subsequently storing data into the memory devices provided respectively to the input side and output side.


Inventors:
HAYASHI HIROSHI
Application Number:
JP15921976A
Publication Date:
July 26, 1978
Filing Date:
December 30, 1976
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01D5/25; G01R31/26; G01R31/3183; G01R31/28; (IPC1-7): G01D5/25; G01R31/26
Domestic Patent References:
JPS4815439A