Title:
TFT LOAD TYPE STATIC RAM
Document Type and Number:
Japanese Patent JP3158531
Kind Code:
B2
Abstract:
PURPOSE: To improve yield by reducing the step of forming TFT loads in a title device.
CONSTITUTION: Gates of respective MOS transistors Q1, Q2 forming TFT loads and drains 3d, 4d channels 3C, 4C and sources 3S, 4S are formed in a single polycrystalline silicon layer 2.
Inventors:
Minoru Takeda
Application Number:
JP24680991A
Publication Date:
April 23, 2001
Filing Date:
August 31, 1991
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H01L27/11; H01L21/8244; H01L29/78; H01L29/786; (IPC1-7): H01L21/8244; H01L27/11; H01L29/786
Domestic Patent References:
| JP334569A | ||||
| JP4234168A |
Attorney, Agent or Firm:
Hideaki Ogawa