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Title:
THIN FILM TRANSISTOR AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3293039
Kind Code:
B2
Abstract:

PURPOSE: To make the gradient of the concentration of impurities gentler in a source region and a drain region in a thin film transistor of an LDD construction.
CONSTITUTION: If phosphorus ion of a high concentration is shallowly implanted at an angle of 30° from the side of a drain region 12b using a gate electrode 14 as mask, its peak can be indicated by a curve P. Next, phosphorous ion of medium concentration is implanted slightly deeply from the same angle of 30°, its peak can be indicated by a curve Q. Next, phosphorous ion of a low concentration is more deeply implanted from the same angle of 30° and then its peak is indicated by a curve R. Also, at the side of source region 12a, the phosphorous ion implantation is performed 3 times with the angle of 150°. Thereafter, the implanted impurities are activated by performing laser annealing at about 400°C, and then the gradient of impurities concentration becomes gentler even though the diffusion of implanted impurities is not performed.


Inventors:
Yoshio Okamoto
Shingo Yamauchi
Application Number:
JP30711891A
Publication Date:
June 17, 2002
Filing Date:
October 28, 1991
Export Citation:
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Assignee:
CASIO COMPUTER CO.,LTD.
International Classes:
H01L21/265; H01L21/336; H01L27/12; H01L29/78; H01L29/786; (IPC1-7): H01L21/336; H01L29/786
Domestic Patent References:
JP58219766A
JP6395669A
JP59198763A
JP639978A
JP2228043A
JP621275A
Attorney, Agent or Firm:
Hanawa Yoshio