Title:
【発明の名称】ヒートシンクを有する電力用半導体装置の製造方法およびプレ-ナマイクロストリップ回路との集積構造体
Document Type and Number:
Japanese Patent JP3133295
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method for forming a heat sink on the back of a semiconductor device at low cost, without requiring dicing and packaging. SOLUTION: An etch-stop layer is formed on the upper surface of a semiconductor wafer, an array of power semiconductor devices is formed on the etch- stop layer, the semiconductor wafer is mounted on a support body with a bonding agent with its upper surface down to expose the back of the semiconductor wafer (22), patterning is carried out on the back of the semiconductor wafer so as to form a web of semiconductor wafer material which defines an array of tabs to expose part of etch-stop layer on the back side of each power semiconductor device to be wider than the semiconductor device (24, 26), a heat sink is formed on the exposed part of the etch-stop layer in each tab and is inwardly spaced separated from the web wall (28, 29, 30), etching is carried out through the exposed part of the etch-stop layer between the heat sink and the web wall (32), and the power semiconductor device having the heat sink is separated from the web and the support.
Inventors:
Dibabani tudley
James A Foscher
Philip H Lawyer
David B. Rensch
James A Foscher
Philip H Lawyer
David B. Rensch
Application Number:
JP36161998A
Publication Date:
February 05, 2001
Filing Date:
December 18, 1998
Export Citation:
Assignee:
Hughes Electronics Corporation
International Classes:
H01L23/36; H01L25/07; H01L25/18; H01L47/02; H01P5/08; (IPC1-7): H01L23/36; H01L25/07; H01L25/18; H01L47/02; H01P5/08
Domestic Patent References:
| JP387027A | ||||
| JP607182A | ||||
| JP2148739A | ||||
| JP513780A | ||||
| JP661388A | ||||
| JP697609A | ||||
| JP6338522A |
Attorney, Agent or Firm:
Takehiko Suzue (4 outside)